Modular multilevel converter based LCL DC/DC converter for high power DC transmission grids

This paper presents a modular multilevel converter (MMC) based DC/DC converter with LCL inner circuit for HVDC transmission and DC grids. Three main design challenges are addressed. The first challenge is the use of MMCs with higher operating frequency compared to common transformer-based DC/DC converters where MMC operating frequency is limited to a few hundred hertz due to core losses. The second issue is the DC fault response. With the LCL circuit, the steady state fault current is limited to a low magnitude which is tolerable by MMC semiconductors. Mechanical DC circuit breakers can therefore be used to interrupt fault current for permanent faults and extra sub-module bypass thyristors are not necessary to protect antiparallel diodes. Thirdly, a novel controller structure is introduced with multiple coordinate frames ensuring zero local reactive power at both bridges in the whole load range. The proposed controller structure is also expandable to a DC hub with multiple ports. Detailed simulations using PSCAD/EMTDC are performed to verify the aforementioned design solutions in normal and fault conditions

Modified half-bridge modular multilevel converter for HVDC systems with DC fault ride-through capability

One of the main challenges of voltage source converter based HVDC systems is DC faults. In this paper, two different modified half-bridge modular multilevel converter topologies are proposed. The proposed converters offer a fault tolerant against the most severe pole-to-pole DC faults. The converter comprises three switches or two switches and 4 diodes in each cell, which can result in less cost and losses compared to the full-bridge modular multilevel converter. Converter structure and controls are presented including the converter modulation and capacitors balancing. MATLAB/SIMULINK simulations are carried out to verify converter operation in normal and faulty conditions

Sensorless multi-loop control of phase-controlled series-parallel resonant converter

This paper proposes a multi-loop controller for the phase-controlled series-parallel resonant converter. Output voltage is solely measured for control and inner loop is used to enhance closed loop stability and dynamic performance compared to single-loop control. No additional sensors are used for inner loop variables. These are estimated using a Kalman filter, based on a linearized converter model. The advantage of this sensorless scheme is not only reducing the number of sensors but more significantly providing an alternative to sensing high frequency resonant tank variables which require high microcontroller resolution in real time. First, the converter non-linear large signal behavior is linearized using a state feedback based scheme. Consequently, the converter preserves its large signal characteristics while modeled as a linear system. Comparison is made between the most suitable state variables for feedback, according to a stability study. Finally, simulation and experimental results are demonstrated to validate the improved system performance in contrast with single-loop control

Reactive power minimization of dual active bridge DC/DC converter with triple phase shift control using neural network

Reactive power flow increases dual active bridge (DAB) converter RMS current leading to an increase in conduction losses especially in high power applications. This paper proposes a new optimized triple phase shift (TPS) switching algorithm that minimizes the total reactive power of the converter. The algorithm iteratively searches for TPS control variables that satisfy the desired active power flow while selecting the operating mode with minimum reactive power consumption. This is valid for the whole range of converter operation. The iterative algorithm is run offline for the entire active power range (-1pu to 1pu) and the resulting data is used to train an open loop artificial neural network controller to reduce computational time and memory allocation necessary to store the data generated. To validate the accuracy of the proposed controller, a 500-MW 300kV/100kV DAB model is simulated in Matlab/Simulink, as a potential application for DAB in DC grids

Analysis and hardware testing of cell capacitor discharge currents during DC faults in half-bridge modular multilevel converters

This paper focuses on the behaviour of the cell capacitor discharge currents during DC faults in half-bridge modular multilevel converters. Active switches, not designed for fault conditions, are tripped to minimize discharge currents effect on the semiconductor switches. Two levels of device protection are commonly in place; driver level protection monitoring collector-emitter voltage and overcurrent protection with feedback measurement and control. However, unavoidable tripping delay times, arising from factors such as sensor lags, controller sampling delays and hardware propagation delays, impact transient current shape and hence affect the selection of semiconductor device ratings as well as arm inductance. Analytical expressions are obtained for current slew rate, peak transient current and resultant I2t for the cell capacitor discharge current taking into account such delays. The study is backed by experimental testing on discharge of a 900V MMC capacitor

Analysis of AC link topologies in non-isolated DC/DC triple active bridge converter for current stress minimization

This paper presents analysis of the non-isolated DC/DC triple active bridge (TAB) converter under various purely inductor-based AC link topologies. The objective of the analysis is to find the topology that incorporates the least value of the AC link inductors which leads to reduced converter footprint in addition to minimum internal current stresses. Modelling of the TAB under each of the different topologies is presented in per unit expressions of power transfer and reactive power assuming fundamental harmonic analysis. The power expressions are used to calculate the inductor values necessary to achieve same rated power transfer of Dual Active Bridge (DAB) converter for the sake of standardizing comparison. On this basis, the topology requiring the least value of interface inductors, hence lowest footprint, is identified. Furthermore, based on phase shift control, particle swarm optimization (PSO) is used to calculate optimal phase shift ratios in each of the proposed topologies to minimize reactive power loss (hence current stress). The topology with minimum stresses is therefore identified and the results are substantiated using a Matlab-Simulink model to verify the theoretical analysis

DC fault isolation study of bidirectional dual active bridge DC/DC converter for DC transmission grid application

Fast isolation and detection of DC faults is currently a limiting factor in high power DC transmission grid development. Recent research has shown that the role of DC/DC converters is becoming increasingly important in solving various DC grid challenges such as voltage stepping, galvanic isolation and power regulation. This paper focuses on an additional important feature of bidirectional dual active bridge (DAB) DC-DC converters which make it attractive for future DC grids; it's inherent fault isolation capability which does not need control intervention to limit fault current in case of the most severe DC faults. Detailed analytical, simulation and experimental study are performed by subjecting the converter to DC short circuit faults at its DC voltage terminals. The results obtained have shown significant advantage of DAB where fault current is less than rated current during the fault duration. Thus no control action is necessary from the non-faulted bridge to limit fault current and no external DC circuit breakers are required. This advantage makes DAB converter feasible for DC grid integration